Skip to content

Namespace hal::cortex_m

Namespace List > hal > cortex_m

libhal drivers for the ARM Cortex-M series of processors

Classes

Type Name
class dwt_counter
A counter with a frequency fixed to the CPU clock rate.
class interrupt
Cortex M series interrupt controller.
class systick_timer
SysTick driver for the ARM Cortex Mx series chips.

Public Types

Type Name
typedef void(*)() interrupt_pointer
Used specifically for defining an interrupt vector table of addresses.
enum irq
IRQ numbers for core processor interrupts.

Public Functions

Type Name
void * get_interrupt_vector_table_address ()
Get the address of the systems interrupt vector table.
void initialize_bss_section ()
Initialize the BSS (uninitialized data section) to all zeros.
void initialize_data_section ()
Initialize the data section of RAM. This should be the first thing called in main() before using any global or statically allocated variables. It can also be called in the startup code before main is called. This is not done by crt0.s (C runtime startup code) because with an OS, when the executable is copied to RAM, the data section is also copied and those same locations can be reused for the application, removing the need to copy the data section. This will also happen if one loads an elf file to an MCU using a debugger. Typically the RAM section, but not BSS, is copied over. But in the case of the MCU without a debugger, the MCU will have to manage coping the contents from ROM to RAM itself. Systems should always assume they haven't been loaded by any means and should set the data section at the start of the application.
void initialize_floating_point_unit ()
Enable the floating point unit coprocessor.
void reset ()
Request reset from CPU.
void set_interrupt_vector_table_address (void * p_table_location)
Set the address of the systems interrupt vector table.
void wait_for_event ()
Executes WFE instruction.
void wait_for_interrupt ()
Executes WFI instruction.

Public Types Documentation

typedef interrupt_pointer

using hal::cortex_m::interrupt_pointer = typedef void (*)();

enum irq

enum hal::cortex_m::irq {
    top_of_stack = 0,
    reset = 1,
    nmi = 2,
    hard_fault = 3,
    memory_management_fault = 4,
    bus_fault = 5,
    usage_fault = 6,
    reserve7 = 7,
    reserve8 = 8,
    reserve9 = 9,
    reserve10 = 10,
    sv_call = 11,
    reserve12 = 12,
    reserve13 = 13,
    pend_sv = 14,
    systick = 15
};

Public Functions Documentation

function get_interrupt_vector_table_address

Get the address of the systems interrupt vector table. 

void * hal::cortex_m::get_interrupt_vector_table_address ()

On reset the VTOR register is set to 0x0000'0000 or nullptr.

Returns:

void* - address within VTOR the interrupt vector table relocation register.

function initialize_bss_section

Initialize the BSS (uninitialized data section) to all zeros. 

inline void hal::cortex_m::initialize_bss_section ()

Not required if the C Runtime 0 (crt0.s/.a/.o) is used as a startup routine.

function initialize_data_section

inline void hal::cortex_m::initialize_data_section ()

function initialize_floating_point_unit

Enable the floating point unit coprocessor. 

void hal::cortex_m::initialize_floating_point_unit ()

WARNING: If the coprocessor does not exist, as it is optional, a UsageFault will occur. Floating point units are only found within Cortex M4 and above processors.

function reset

void hal::cortex_m::reset ()

function set_interrupt_vector_table_address

Set the address of the systems interrupt vector table. 

void hal::cortex_m::set_interrupt_vector_table_address (
    void * p_table_location
)

The interrupt vector table (IVT) is held in ROM which means that, either the interrupt service routines (ISR) had to be defined at compile time making them immutable at runtime, or that each ISR calls a mutable function pointer which can be changed at runtime.

The problem with the first option is that it makes writing and using libraries difficult. Usually requiring updates to the IVT manually by the application designer based on what libraries and drivers the application is using.

The second solution has a problem where the additional another layer of indirection increases interrupt latency. A more critical problem of this approach is that many ISRs take advantage of the state of the system when the ISR runs. For example, context switching in an RTOS needs to be able to see the address of where code was when the interrupt occurred and having an additional point of indirection (i.e. calling a function pointer) will change that location from the task to the ISR that called the context switch function. This will usually result in a fault of some sort.

Creating an interrupt vector table in RAM and relocating the ISRs there consumes RAM space, but gives great flexibility over the table at runtime.

Parameters:

  • p_table_location - address of the interrupt vector table.

function wait_for_event

Executes WFE instruction. 

void hal::cortex_m::wait_for_event ()

The WFE instruction stops the CPU, reducing power, and wakes up on event.

function wait_for_interrupt

Executes WFI instruction. 

void hal::cortex_m::wait_for_interrupt ()

The WFI instruction stops the CPU, reducing power, and wakes up on interrupt.

The documentation for this class was generated from the following file libraries/include/libhal-armcortex/dwt_counter.hpp